JPH0749802Y2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH0749802Y2
JPH0749802Y2 JP1990097377U JP9737790U JPH0749802Y2 JP H0749802 Y2 JPH0749802 Y2 JP H0749802Y2 JP 1990097377 U JP1990097377 U JP 1990097377U JP 9737790 U JP9737790 U JP 9737790U JP H0749802 Y2 JPH0749802 Y2 JP H0749802Y2
Authority
JP
Japan
Prior art keywords
terminal piece
lead wire
terminal
external
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1990097377U
Other languages
English (en)
Japanese (ja)
Other versions
JPH03106755U (en]
Inventor
伸 征矢野
敏総 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1990097377U priority Critical patent/JPH0749802Y2/ja
Priority to GB9119472A priority patent/GB2249869B/en
Priority to DE19914130899 priority patent/DE4130899C2/de
Priority to US07/760,906 priority patent/US5155660A/en
Publication of JPH03106755U publication Critical patent/JPH03106755U/ja
Application granted granted Critical
Publication of JPH0749802Y2 publication Critical patent/JPH0749802Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Landscapes

  • Multi-Conductor Connections (AREA)
JP1990097377U 1989-12-28 1990-09-17 半導体装置 Expired - Lifetime JPH0749802Y2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP1990097377U JPH0749802Y2 (ja) 1989-12-28 1990-09-17 半導体装置
GB9119472A GB2249869B (en) 1990-09-17 1991-09-12 Semiconductor device
DE19914130899 DE4130899C2 (de) 1990-09-17 1991-09-17 Halbleitervorrichtung
US07/760,906 US5155660A (en) 1990-09-17 1991-09-17 Semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP15258989 1989-12-28
JP1-152589 1989-12-28
JP1990097377U JPH0749802Y2 (ja) 1989-12-28 1990-09-17 半導体装置

Publications (2)

Publication Number Publication Date
JPH03106755U JPH03106755U (en]) 1991-11-05
JPH0749802Y2 true JPH0749802Y2 (ja) 1995-11-13

Family

ID=31718719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990097377U Expired - Lifetime JPH0749802Y2 (ja) 1989-12-28 1990-09-17 半導体装置

Country Status (1)

Country Link
JP (1) JPH0749802Y2 (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5283277B2 (ja) * 2009-09-04 2013-09-04 日本インター株式会社 パワー半導体モジュール
JP5863602B2 (ja) * 2011-08-31 2016-02-16 三菱電機株式会社 電力用半導体装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3085655U (ja) * 2001-09-17 2002-05-17 一三 木村 立体組み合わせパズル

Also Published As

Publication number Publication date
JPH03106755U (en]) 1991-11-05

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Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term